A circuit level hot-carrier evaluation system

A fully integrated system that facilitates the evaluation and prediction of hot-carrier effects at the circuit level is described. The system is capable of executing constant voltage and constant current ratio stress conditions at the transistor level, performing extensive data analysis and extraction, and simulating circuit reliability at a user-defined future time. Through these enhancements, more precise model parameter values can be attained, which in turn improves the overall accuracy of the circuit aging simulation. Quantitative verification of the simulation results against experimental data was accomplished using 0.5- mu m CMOS ring oscillators. The reliability of the ring oscillators as a function of stress time, power supply voltage, capacitive loading, and passivation technology is analyzed. In all these cases, less than 2% absolute error was observed between the experimental and simulation results when using this automated hot-carrier evaluation system.<
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