Lightweight TRNG Based on Multiphase Timing of Bistables

The paper presents a concept of a True Random Number Generator (TRNG) that utilizes phase noise of a pair of ring oscillators (ROs) to increase the variance of the initial condition of a bistable. For this purpose a special TRNG D-latch architecture (TDL) has been proposed, which can either operate in the oscillatory ring-oscillator mode or the nearly-metastable mode. The RO mode increases the probability of the nearly metastable operation of the TDL, which in turn increases the mean value and variance of the resolve time. Moreover, due to the oscillatory nature of the TDL metastability, the resolve time can be easily measured and used for further randomness harvesting in the TRNG. The proposed TRNG uses a pair of TDLs to reduce sensitivity to process or temperature variation, whereas TDLs' individual resolve time, their resolve time difference and logical state contribute to randomness. In the article, the impact of the devices' imbalance (tolerance) resulting from process variation on the resultant entropy is also explored. The proposed TRNG based on TDLs is scalable and has been implemented in modern CPLD and FPGA devices whereas the bit rate reached up to 1 Mbit. The article also discusses theoretical issues related to a transformation of phase and resolve time probability density functions and their influence on TRNG parameters.