Corrections to “A Novel Metal-Ferroelectric-Insulator-Silicon FET With Selectively Nucleated Lateral Crystallized Pb(Zr,Ti)O3 and ZrTiO4 Buffer for Long Retention and Good Fatigue” [Oct 15 DOI: 10.1109/LED.2015.2472987]

In the above paper, there was some wrong information in the experiment section. Some of the thickness and processing temperature needs to be corrected. For corrections, the shallow trench isolation (STI) is 400-nm depth. The ZrTiO
₄
(ZTO) thickness is 2-nm. For the rapid thermal annealing (RTA), the temperature is 650 °C exposed for 1-sec and waited for 29 sec for cooling the RTA system. The source and drain doping was performed at 15 keV, not 17 keV.