Design of High-Precision ROIC for Quantum Dot Infrared Photodetector

Read out integrated circuit (ROIC) design for quantum dot infrared photodetector (QDIP) array requires large charge handling capacity, low readout noise, minimum detector bias voltage variations, and minimum power dissipation. ROIC design for such applications is challenging due to complex requirements and often needs iterative fabrications to meet all requirements. In this letter, we propose a decision matrix-based optimization method for large dynamic range ROIC implementation. The optimization method is based on trade off analysis, design, and simulation of identified ROIC parameters. This methodology has been applied to an actual case, and the optimum ROIC topology was selected using the optimization method described in this letter. The critical specifications are charge handling capacity of greater than 5
$\text{M}\overline {e}$
and low readout noise of less than 600 electrons, in 180-nm CMOS process. The large dynamic range ROIC consists of a charge integration stage, charge to voltage converters, correlated double samplers, sample and holds, column amplifiers, analog multiplexer, and a buffer amplifier stage. This letter also highlights the measured test chip results of an ROIC array of 30
$\mu \textrm {m} \times 30~\mu \text{m}$
pixel size, in which we have been able to achieve a charge handling capacity of 9.8
$\text{M}\overline {e}$
and the noise of 350 electrons.