Design of Current Control Loop for Grid Connected Inverters Operating Under Nonideal Grid Conditions

A case study for designing the current control loop for single-phase inverters connected to weak grids is presented. The problems associated to the design of current control loop when highly distorted grid voltages are present and LCL filters are used to couple the inverters to the grid, are analyzed. Fourier coefficients decomposition is used to obtain an ahead-of-time version for the nonideal voltage signal which allows to compensate the current control loop delay. Also the relevance of a nonideal characteristic of the inverter as the dead-time effect on the shape of the controlled current is analyzed and compensated.