Amorphous silicon thin film transistor with a buried double-gate structure

An amorphous silicon thin-film transistor (a-Si TFT) with a novel structure is described. A second gate electrode is introduced into a gate insulator of silicon nitride in addition to the conventional staggered a-Si TFT gate electrode. The performance of this TFT is characterized in terms of geometry and operating conditions. Equivalent electron mobility up to 1.8 cm/sup 2//(V-s) is achieved for optimized designs. It is also confirmed that the newly developed TFT preserves high reliability. Results of I-V measurements demonstrated that the on-current of a buried double-gate (BD) TFT reaches three times that of a conventional TFT. The V/sub t/ shift of the BD-TFT is about one-third that of the conventional TFT for the same gate electric field. The performance is suitable for large-area, high-resolution liquid-crystal displays.<
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