0.6 mu m high speed BiCMOS technology with emitter-base self-aligned structure

A high-speed BiCMOS technology called emitter-base self-aligned BiCMOS (ESBiC) has been developed. This process combines the polysilicon emitter-base self-aligned bipolar transistor with a 0.6- mu m-gate CMOS transistor. With this process, a 15-GHz cutoff frequency and an ECL (emitter-coupled logic) basic delay time of 60 ps at I/sub cs/=1 mA are achieved. For the BiCMOS gate, a 200-ps basic delay and a 330-ps delay time with 0.5-pF load capacitance are obtained.<>