A poly-Si thin-film transistor EEPROM cell with a folded floating gate

A new polysilicon thin-film transistor (poly-Si TFT) EEPROM with the folded floating gate structure has been proposed to suppress the field dependent leakage current at the programmed state. The control gate folds the floating gate and acts as a field plate to reduce the leakage current. As a result, the leakage current is maintained to the minimum level at an off-state control gate bias, irrespective of the programmed state, which is confirmed by simulation and experimental results. The fabricated poly-Si TFT EEPROM shows successful programming/erasing operation with a threshold voltage shift of 1 V after 5/spl times/10/sup 4/ program and erase cycles.