Drain avalanche breakdown in gallium arsenide MESFET's

Avalanche breakdown in GaAs MESFET's simulated by two-dimensional (2-D) numerical calculation with a two-carrier model. The simulation involves electron-hole pair generation due to impact ionization and employs a simplified model of the surface depletion layer of GaAs. Gate-bias-dependent drain breakdown voltage is demonstrated. The effect of the surface depletion layer, drain-to-gate spacing and n/sup +/ layer under the drain contact upon the breakdown voltage is demonstrated. It is clarified that the surface depletion layer has a pronounced effect on the gate-bias dependence of the breakdown voltage. The breakdown mechanism is explained in terms of conductivity modulation in the semi-insulting substrate.<
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