Highly efficient alpha-beta pruning minimax based Loop Trax Solver on FPGA

This article presents our hardware architecture of an alpha-beta based hardware engine for Loop Trax board game presented in the 2nd National Digital System Design Contest of Iran. In our proposed architecture, we used minimax algorithm with a highly efficient alpha-beta pruning and hardware parallelization to speed up the most time-consuming tasks. We also included a technique called Path Based Memory, which causes sensible reduction of data storage and simplification of calculations. The results show that our design can run up to 50MHz on Altera DE2 platform and requires 27k LEs.