The III-Nitride Double Heterostructure Revisited: Benefits for Threshold Voltage Engineering of MIS Devices

GaN-based devices are seen as ideal candidates for power-switching applications. For the acceptance of GaN-based devices by module designers, obtaining enhancement-mode (e-mode) behavior in GaN-based heterostructure field-effect transistors (HFETs) has long been in the focus. Although the gate-injection approach appears to be the most promising one to achieve e-mode devices, using a double heterostructure in conjunction with a gate insulator has still its advantages, such as steeper turn-ON characteristics and lower leakage currents. An analytical expression to predict the threshold voltage V
_th
for a given double heterostructure device has not yet been derived. Moreover, neither an evaluation of the tradeoff between V
_th
and ON-state resistance R
_ds,ON
has been performed to date. This paper addresses these two aspects. We will show an analytical expression for a metal-insulator-semiconductor double HFET (MIS-DHFET), which in certain cases is also valid for the gate-injection transistor. On the basis of this, we will discuss the actual influence of the Al concentration in the backbarrier on V
_th
. We will further employ technology computer aided design (TCAD) device simulations to evaluate the impact on R
_ds,ON
when using MIS-DHFETs. It will be shown that by implementing a double heterostructure in MIS devices, it is possible to suppress the typically observed negative V
_th
-oxide thickness relationship while maintaining a constant R
_ds,ON
.