PLL phase error and power supply noise [microprocessors]

Phase error in phase-locked loops (PLLs) in microprocessor systems is discussed. The distinction between jitter, or random phase error, and systematic accumulated phase error is explained. Accumulated phase error is caused by disturbances of the power supply voltages. Even a short disturbance can lead to a phase error which persists and accumulates over many clock cycles. A system which creates controlled power supply noise and measures the PLL response is described. Examples are shown using the PLL of a 400 MHz S/390 microprocessor.