Echo State Networks for Black-Box Modeling of Integrated Circuits

A black-box method for modeling the time-domain response of integrated circuits (ICs) based on echo state networks is proposed. The number and value of the input and feedback delays required for modeling nonlinear systems with memory are detected automatically, and the training procedure is very fast and robust. The resulting models can be implemented in any hardware description language. The proposed modeling approach is applied to three test cases that cover a wide range of analog behavior. The achieved accuracy is comparable to the reference modeling method, and, depending on the complexity of the modeled IC, the simulation speed-up factor is in the order between 10 and 100.