Analysis and design of fixed voltage transfer ratio DC/DC converter cells for phase-modular solid-state transformers

Many Solid-State Transformer (SST) concepts employ cascaded AC/DC converter cells to handle the comparatively high medium-voltage (MV) grid voltages, resulting in a phase-modular structure. Accordingly, each cell - formed by an AC/DC input stage and an isolated DC/DC output stage - processes a power fluctuating with twice the grid frequency. The series resonant converter (SRC) operated in the half-cycle discontinuous-conduction-mode (HC-DCM) is a highly attractive choice for the isolated DC/DC converter because of its high efficiency. However, this converter does not offer any control possibilities; instead, it couples the two DC voltages through certain dynamics with fixed voltage transfer ratio. This leads to a propagation of the input side power fluctuations through the SRC to the common LV bus, which has certain consequences on the converter design. The paper therefore re-derives a dynamic model of the SRC's terminal behavior in a generic way, which also covers the case of comparatively small DC link capacitors. The experimentally verified dynamic model is then used to discuss and optimize the choice of the input and output side capacitances of the DC/DC converter cell with respect to the placement of the converter's system level resonances, such as to obtain minimum volume and losses. Finally, aspects related to the design of a scaled demonstrator system featuring similar dynamic behavior as the full-scale system are addressed and first measurement results are presented.