Defect Reduction Using Yield Management Test Structures

Design and applications of Yield Management test patterns on memory products have been reviewed. Evaluations are made for Y.M. patterns and conventional T.K. patterns in terms of their ability to faithfully point out process deviations/defects and to predict CP yield. It s assessed that Y.M. patterns are superior to T.K. patterns in terms of the previous criteria. Finally, design guidelines will be also discussed.