DPM-PSTM: Dual-Port Memory Based Python Software Transactional Memory

Recently, hardware transactional memories (TMs) became available in some commercial multicore processors but due to its immaturity they are still not considered as a common feature available in processors, which provides researchers a chance to continue their work in the field of software TMs (STMs). This paper presents a novel STM design for Python (PSTM) based on a dual-port memory mechanism. The novel STM aims to mitigate overheads introduced by a message transferring mechanism used in the first version of PSTM, which is based on Queue and Pipe abstractions. Both versions are experimentally evaluated on Simple Bank program and simple performance benchmark. The PSTM version based on a dual-port memory mechanism achieves better performance in a case of intensive transaction (re)execution while in a first-take-successful transaction execution results of both PSTM versions are comparable. In the former case the PSTM version based on a dual-port memory mechanism achieves better results due to architecture advantages, i.e. reducing a message transfer overhead.