A 1.2-W single-chip MPEG2 MP@ML video encoder LSI including wide search range (H/spl plusmn/288, V:/spl plusmn/96) motion estimation and 81-MOPS controller

An MPEG2 MP@ML video encoder large-scale integrated circuit (LSI) has been developed including an 81 MOPS controller and motion estimator. By using two adaptive algorithms, a wide motion-estimation search area (/spl plusmn/288 pixels horizontal and /spl plusmn/96 pixels vertical) was achieved with computation complexity of only 0.5% (20 GOPS) of full search block-matching algorithm. By using this expanded motion-estimation search area, there is a significant improvement in picture quality for coding fast motion sequences. The power consumption was reduced by using an efficient pipeline architecture and optimizing the circuitry, especially in the motion-estimation block and the data transfers for the external SDRAM. The 13.7/spl times/12.4 mm/sup 2/, 4.5-M transistor device using 0.4-/spl mu/m CMOS technology dissipates 1.2 W at 3.3 V.