A 32k/spl times/8 radiation-hardened CMOS/SONOS EEPROM

A 32k/spl times/8 radiation tolerant CMOS/SONOS EEPROM is described. The technology is a 1.2 micrometer radiation tolerant CMOS process into which is incorporated an oxide-nitride-oxide nonvolatile memory dielectric. This ONO dielectric, when used as the gate dielectric of an n-channel MOSFET, forms the variable threshold transistor which is the basis for the EEPROM. Charge is stored by tunneling into traps in the nitride, rather than on a floating gate as is done with most EEPROMs. No hot electron effects are used for programming or erase, so programming and erase power dissipation are quite low. The circuit was designed at Sandia National Labs and the device was fabricated by Northrop Grumman Corporation.