A note to low-power linear feedback shift registers

Low power has emerged as a principal theme in today's electronics industry. The need for low power has caused a major paradigm shift in which power dissipation is as important as performance and area. A paper by Lowy (1996) is quite interesting in this regard. The author talks of a parallel architecture of linear feedback shift registers (LFSRs) and sequence generators that have a lower power dissipation than that of conventional LFSRs. This paper comments on some design improvements and explores some techniques that would make the LFSRs capable of handling different low-power applications. The advantages of using nonprimitive polynomials with two taps in implementing low-power LFSRs are analyzed in this paper. It is found that if the taps are taken from the last and center of the flip-flops, the number of switch requirements reduces from the order of M+N to the order of N, where N is the length of the shift register and M is the number of taps. This sort of tapping also results in a simpler switch minimization algorithm. With our strategies, it is possible to generate much better sequences from Lowy's LFSRs structure. Moreover, power dissipation is constant in our case, independent of the number of stages in the LFSRs. Our simulations show that the percentage of power improvement to conventional serial LFSRs is from 51.65% (N=18) to 68.51% (N=28).