Hot carrier degradation modeling of short-channel n-FinFETs

Figure 1(a) shows the degradation of the transfer characteristics of a typical FinFET with W
_fin
= 10 nm, measured at V
_d
= 0.03 V after HC stress at V
_stress
= 1.8 V for different stress times. The degradation of the device parameters V
_t
, η and on-state drain current is clearly observed. The positive V
_t
shift indicates the built-up of a negative charge in the gate dielectric. The negative charge can result either from electron trapping in the gate dielectric or from generation of acceptor-type interface traps. Figure 1(b) shows the transconductance g
_m
degradation during HC stress. Degradation of the maximum g
_m
is observed attributed to the interface degradation, with a simultaneous parallel g
_m
shift due to charge injection into the gate dielectric bulk defects [4]. Using the relation SS=(kT/q).qD
_it
/C
_ox
for the subthreshold slope SS, where C
_ox
is the gate oxide capacitance and kT is the thermal energy, from figure 1(a) the extracted interface trap density D
_it
changes from 4×10
¹²
to 5.5×10
¹²
cm
^-2
eV
^-1
.