Three-Dimensional Computational Analysis of Accumulated Body MOSFETs

Accumulated body approach for short- and narrow-channel (10-nm scale) bulk Si MOSFETs is analyzed through 3-D finite-element studies. Accumulation of the side interfaces is achieved by a side-gate structure surrounding the body of the transistor, which leads to the accumulation of the body for narrow structures. A separately controlled top gate is used for transistor action. The simulation results show the suppression of leakage currents by 10
⁶
times for no side-interface charges, and by 10
¹⁰
times for an interface positive fixed charge density of 10
¹²
cm
^-2
. The threshold voltage (VT) can be dynamically increased by over 1 V with the accumulation of the body (V
_side
= 0 to -3 V) for W × L = 10-nm × 15-nm structures, enabling electrostatic VT control and reliable high-temperature (>600 K) operation. Improvements in subthreshold slope and drain-induced barrier lowering are significant for narrower channel devices.