Extending a 0.35 NA h-Line Stepper to 0.8 Micrometer (1.6 Micrometer Pitch) CMOS Technology Using Halo LDD Devices and Trilayer Templates

A fully scaled 0.8 micron (1.6 /spl mu/m pitch) CMOS process which can be used to extend the usable life of equipment one generation beyond its intended life is described. The process utilizes a double spacer halo LDD device and a Si template trilayer resist process to produce 0.8 micron features over topography using a 0.35 NA h-line stepper. This process has been used to manufacture a 1.5 million transistor circuit, Bioscan.