VLSI array processor implementation of quasi-block state-space IIR digital filters

A new array processor implementation of IIR digital filters is proposed with a high input sampling rate which is not limited by the speed of the processor elements involved. The proposed implementation is based on the quasi-block state-space description of IIR digital filters corresponding to the case of parallel combination of second-order sections. Performance comparison (in terms of hardware complexity and speed) of the proposed implementation with another existing implementation is also presented.