New Ti-SALICIDE process using Sb and Ge preamorphization for sub-0.2 /spl mu/m CMOS technology

A new process for thin titanium self-aligned silicide (Ti-SALICIDE) on narrow n/sup +/ poly-Si lines and n/sup +/ diffusion layers using preamorphization implantation (PAI) with heavy ions of antimony (Sb) and germanium (Ge) has been demonstrated for application to 0.2-/spl mu/m CMOS devices and beyond. Preamorphization enhances the phase transformation from C/sub 49/Ti/sub x/Si/sub x/ to C/sub 54/TiSi/sub 2/ and lowers the transformation temperature by 80/spl deg/C so that it occurs before conglomeration in narrow lines. Preamorphization by Sb and Ge implantation yields better results than that by As. The sheet resistance of TiSi/sub 2/ on heavily As doped poly-Si lines are 3.7 /spl Omega///spl square/ and 3.8 /spl Omega///spl square/ for the samples preamorphized by Ge and Sb implantations even with line width down to 0.2 /spl mu/m. There is less leakage in the Ti-SALICIDE diode with preamorphization than without it. The probable reasons and mechanisms are discussed.