Vectorless transient power grid verification: A case study with IBM benchmarks

Vectorless power grid verification is a powerful method that evaluates the worst-case voltage noises without detailed current waveforms by using optimization techniques. It is extremely challenging when considering transient current excitations, because transient currents are difficult to model and multiple time steps should be evaluated after the discretization of the system equation. In this work, we propose to perform vectorless verification with transient constraints and power constraints defined per clock period (or per hyper-period of multiple clocks if the grid supports multiple clock domains), so that the worst-case voltage noises of each node at any time step can be computed by transient simulation and solving optimization problems. More importantly, we apply the proposed transient verification approach to build a vectorless verification flow for IBM power grid transient analysis benchmarks, and evaluate the accuracy and runtime performance of the proposed approach with different hierarchical constraint setups. Experimental results show that the avg./max. errors of the proposed approach can be within 6%/9% of VDD, and the runtime to solve the optimization problems can be comparable to (or even larger than) the transient simulation time.