Power delivery solutions in 3-D processor-DRAM systems in presence of hot spots

An important application of 3-D integration technology is stacked processor-DRAM systems. One of the major design issues in 3-D processor-DRAM stacks is power delivery. Presence of hot spots, high density power regions, in processor die poses serious challenges to the design of power distribution network (PDN). In this paper, we investigate solutions to ensure power integrity in the hot spot regions.