Energy performance of FPGAs on PERFECT suite kernels

Energy efficiency as a metric has gained significant importance in the recent years. The goal of the TAPAS project is to discover and develop revolutionary approaches that will generate energy-efficient designs on embedded computing systems. One suitable target platform for implementing energy-efficient algorithms is the FPGA, due to its low power consumption, high performance and efficiency, and high degree of programmability. We develop optimizations targeted at reducing memory and communication energy dissipation on FPGAs. We design parameterized architectures for six kernels selected from the PERFECT benchmark suite, applying our memory and communication optimizations. Our optimizations demonstrate 3x to 110x energy efficiency improvement compared to baseline implementations.