A design of low complex log likelihood ratio for MIMO decoder using the bit shift

In Multiple Input Multiple Output (MIMO) decoders, soft decision in the form of Log Likelihood Ratio (LLR) is often used to enhance the error correction probability of the Forward Error Correction (FEC). In order to compute the LLR, the zero's probability and the one's probability of an information bit must be known. In case of using the K-best maximum likelihood detection (MLD), only a subset of constellation nodes is considered for computing the LLR. Which results in cases where values of information bit corresponding to the selected nodes are all zero (or one). In those cases, the one's (or zero's) probability cannot be found. In other words, conventional method calculates LLR approximation with maximum value calculation, but it is high complex. In this paper, we propose a design of MIMO decoder using LLR approximation with low complexity achieved by approximating the maximum value calculation. Our proposed method approximates LLR using the bit shift of the minimum value already calculated. The Bit Error Rate (BER) performance of the IEEE 802.11ac system and ASIC synthesis results of the 4×4 K-best MLD when using these two methods are shown and analyzed. As a result, our proposed design can reduce 27% of the circuit size and the power consumption while maintaining the BER performance of the conventional method.