Analysis of delay time instability according to the operating frequency in field shield isolated SOI circuits

It has been demonstrated that field shield (FS) isolation technology can suppress the delay time instability according to the operating frequency. The FS isolation technology has been proposed to fix the body potential without any area penalty in a gate array. In this technology, an FS plate, which is an additional polysilicon gate, is introduced to electrically isolate active regions. The body potential of the SOI MOSFET can be fixed through the SOI layer under the FS plate. The effect of body resistance on the delay time instability was also investigated using device simulation. The simulation showed that although the body potential momentarily falls to a nonsteady level due to capacitive coupling during switching operation, the body potential recovers to a steady level, following the RC law. From the simulation result, a helpful design guideline concerning the body resistance was deduced. This guideline showed that the FS isolation has a superior capability to suppress the frequency-dependent instability for practical deep submicron SOI circuits.