A new low-power GaAs two-single-port memory cell

This paper describes an experimental static memory cell in GaAs MESFET technology. The memory cell has been implemented using a mix of several techniques already published in order to overcome some of their principal drawbacks related to ground shifting, destructive readout, and leakage current effects. The cell size is 36/spl times/37 /spl mu/m/sup 2/ using a 0.6-/spl mu/m technology. An experimental 32 word /spl times/ 32 bit array has been designed. From simulation results, an address access time of 1 ns has been obtained. A small 8 word/spl times/4 bit protoype was fabricated. The cell can be operated at the single supply voltage from 1 up to 2 V. The evaluation is provided according to the functionality and power dissipation. Measured results show a total current consumption of 14 /spl mu/A/cell when operated at 1 V.