Skeleton Particle-in-Cell Codes on Emerging Computer Architectures

The next generation of supercomputers will likely consist of a hierarchy of parallel computers. If we define each supercomputer node as a parameterized abstract machine, then it's possible to design algorithms independently of the hardware. Such an abstract machine can be defined to consist of a collection of vector (SIMD) processors, each with a small fast memory communicating via a larger global memory. This abstraction fits a variety of hardware, such as GPUs and multicore processors with vector extensions. To program such an abstract machine, we can use many ideas familiar from the past as well as some new concepts. Examples from plasma particle-in-cell (PIC) codes help illustrate this approach.