High-level synthesis of digital circuits using genetic algorithms

Describes a high-level synthesis system that uses genetic algorithms (GAs). The use of GAs allows for a synthesis method that is more flexible and more adaptable to new constraints than the traditional heuristic and integer linear programming approaches. The proposed GA tool is suitable for large, realistic problems. It performs simultaneous scheduling, allocation and binding of functional and storage units minimizing multiple related performance constraints such as latency, area throughput and power. The synthesis tool is capable of performing with control/data flow graphs.