Hardware-efficient FPGA implementation of symbol & carrier synchronization for 16-QAM

This paper describes the hardware efficient implementation of Non data aided method for Symbol timing Synchronization and Carrier phase synchronization for 16-QAM on Kintex 7 FPGA using a feedback structure. Costas loop is used for Carrier phase synchronization and pre-filtering is done for Symbol timing Synchronization to extract the symbol timing information. The performance of the receiver is tested by subjecting it to AWGN during the transient state and steady state and the practical tested results are matching with the computer simulated results. The receiver performance is measured in fixed frequency mode for high data rate.