2T 2:1 MUX based 1 bit full adder design

This paper puts forward a methodology for designing 1 bit full adder using a 2T mux. The 2T mux is combined in a specific manner to get a full adder with sum and carry output. The resulting 1 bit full adder is made up of 16 transistors. The simulation is done using Cadence Virtuoso Simulator using 180nm technology and 1.8V power supply. The results show the efficiency of the design.