Implementing logic in FPGA embedded memory arrays: architectural implications

It has become clear that embedded memory arrays will be essential in future FPGAs. These arrays were originally intended to implement storage, but recent work has shown that they can also be used to implement logic very efficiently. In this paper, we explore how the depth, width, and flexibility of the embedded arrays affect their ability to implement logic. It is shown that each array should contain between 512 and 2048 bits, and should have a word width that can be configured as 1, 2, 4, or 8.