An energy conscious methodology for early design exploration of heterogeneous DSPs

In this paper, we introduce an energy-conscious methodology to guide algorithm partitioning and mapping of embedded DSP applications onto heterogeneous architecture components. The methodology supports both realistic algorithm-architecture (simultaneous optimization at different abstraction levels) as well as hardware-software co-design (optimization over various architectural alternatives). Macro-model based predictors are used to provide early feedback on the impact of design selections and partitions. A case study is presented to demonstrate the methodology flow.