In-Built N+ Pocket p-n-p-n Tunnel Field-Effect Transistor

The source-pocket (p-n-p-n) tunnel field effect transistor (TFET) has a narrow and highly doped N
⁺
pocket layer between the source and channel to enhance the overall performance of the conventional p-i-n TFET. However, realizing this, N
⁺
pocket increases the fabrication complexity since either an epitaxial growth in vertical TFETs or an implantation in planar TFETs is required to create the N
⁺
pocket. In this letter, using the charge plasma concept, we propose a technique to realize an in-built N
⁺
pocket without the need for a separate implantation. We demonstrate using 2-D simulations that the proposed in-built N
⁺
pocket p-n-p-n TFET exhibits a higher I
_ON
(~20 times) and a steeper subthreshold swing (25 mV/decade) as compared with the conventional p-i-n TFET. Our approach overcomes the difficulty of creating a narrow N
⁺
pocket doping and thus makes the p-n-p-n TFET more attractive in carrying on with the scaling trend.