A high performance (Al,Ga)As/GaAs MODFET butterfly adder chip for FFT computation

A report is presented on a butterfly adder chip for high-speed computation of fast Fourier transforms (FFTs). It was fabricated using a 1- mu m self-aligned gate GaAs heterostructure FET (MODFET) technology. The chip receives products from a complex multiplier and generates radix-4 butterfly terms in 32 ns or radix-2 butterfly terms in 16 ns. It also provides the scaling necessary for satisfactory computation of a discrete Fourier transform (DFT) using fixed-point arithmetic. A total of 3800 DCFL gates and over 15700 active devices is required to implement the butterfly adder. The butterfly adder clocks at 262 MHz and it consumes 2.7 W. When used in conjunction with a companion complex multiplier chip of comparable size and other smaller support chips, the butterfly adder allows the computation of a complex DFT on 2048 samples in 100 mu s with a precision of 16 b.<
>