Embed glass interposer to substrate for high density interconnection

Current organic substrates are limited to lines/space 10/10 μm and via size around 50 μm. However, the semiconductor with advance node needs fine line/space of 5/5 or 3/3 and even 2/2 μm in the future. Interposer provides a high density interconnection with fine line and small via that cannot be matched by current laminate substrate technology. We have proposed a new structure that embedded interposer to organic substrate (Flip chip - Embedded Interposer Carrier, FC-EIC
^®
). This structure has virtues of know good substrate and compatible with current packaging and assembly infrastructure. We have demonstrated the feasibility of integrating silicon interposer to a laminate substrate. In this paper, we evaluated the feasibility of integration of a glass interposer into an organic substrate. The selection of glass, temporary bonding materials and built-up dielectric materials were established. The compatibility of lamination and built-up process with glass interposer was demonstrated. By using dielectric materials with small CTE and high modules together with an innovative structure, significant warpage reduction of the EIC-glass was achieved. For a 10 cm × 10 cm laminated carrier with a proper dielectric material set, the panel warpage of the EIC-glass structure can be reduced from 20 mm to less than 3 mm. The EIC-glass structure has been tested under 500 TCT cycles and no glass damage and delamination between glass and the built-up dielectric film was observed.