A 360ps 24b Josephson Carry-select Adder

Multi-bit Josephson processing units for sub-ns clock system use a carry-select algorithm which is applied to a 24b Josephson adder fabricated in l.5µm all-niobium technology. Delay measurement shows a 360ps add and a 300ps carry propagate. The chip contains 1006 gates and dissipates l.8mW.