A 3 V, 2.8 mW CMOS /spl Delta//spl Sigma/-modulator for GSM applications

A 3V, 2.8 mW /spl Delta//spl Sigma/-modulator for mobile radio applications has been implemented in a 0.5 /spl mu/m CMOS technology. The circuit has a dynamic range of 86 dB for a 100 kHz input signal bandwidth and achieves a maximum signal to noise and distortion ratio of 81 dB. Power consumption has been minimized by optimal OTA design for just the required speed, and by striking a careful balance between quantization and circuit noise.