Failure analysis and optimization for synchronous rectifier Lateral DMOS transistor in DC-DC buck converter

In this work, a new failure mechanism for the multifinger synchronous rectifier Lateral DMOS (LDMOS) in an 18V-to-5V DC-DC buck converter under overload current condition has been presented. An optimization structure based on the failure mechanism is also proposed to improve the rated load current of the converter. The novel LDMOS makes the rated load current of the DC-DC converter increase by 17%.