A 0.5–6 GHz 25.6 dBm fully integrated digital power amplifier in 65-nm CMOS

This paper presents a 0.5-6 GHz fully-integrated Digital Power Amplifier (DPA) in 65 nm CMOS technology. Transformer-based class-E/F power amplifiers with zero-voltage switching are designed to achieve high power and high efficiency across a wide frequency band. A Single-Pole Triple-Throw (SP3T) switch featuring low insertion loss and high isolation is implemented to select the output of one of the three sub-band DPAs covering approximately 0.5-1.3 GHz, 1.3-3.2 GHz, and 3.2-6 GHz, respectively. Measurement results show a peak output power of 25.6-22.8 dBm with a peak drain efficiency of 34%-20% across 0.5-6 GHz.