5-Gb/s and 10-GHz Center-Frequency Gaussian Monocycle Pulse Transmission Using 65-nm Logic CMOS With On-Chip Dipole Antenna and High- $\kappa $ Interposer

Interchip data transmission was demonstrated using impulse radio ultrawideband complementary metal- oxide-semiconductor (CMOS) transmitter integrate circuits with on-chip dipole antennas. A differential pseudorandom binary sequence of 2
⁷
data of Gaussian monocycle pulse (GMP) was formed by 65-nm CMOS logic circuits using upand downpulses with certain gate delays. The CMOS transmitter generated 5-Gb/s GMP with the center frequency of 10 GHz. To improve transmission gains, an interposer with the high dielectric constant (ε
_r
= 38) and optimized thickness was inserted under the CMOS chips as a dielectric slab waveguide. 2-Gb/s GMP signals were transmitted and received in the distance of 10 mm by use of the CMOS on-chip antennas and the high-κ interposer.