Precision Delay Circuit for Analog Quadrature Signals in Sin/Cos Encoders

This paper considers the problem of setting small and accurate delay of those analog quadrature signals generated in the sin/cos encoders within the range of ±10°. Such precision is needed for the efficient phase shift compensation. A typical analog delay circuit is comprised of a summing amplifier and digitally controlled variable resistor used to set a delay of the cos signal. The main disadvantage of this delay circuit is poor linearity. We propose a new circuit based on a voltage divider with about three times better linearity and a completely symmetrical range. The effects of the component tolerances and signals' irregularities on the accuracy of the delay are explored. The detailed theoretical worst case analysis and simulation shows that for the integrated version with the 128-tap digital potentiometer (ΔR/R = 1 LSB = 0.8%), the tolerances contribute 0.34° to the total error and typical signal irregularities of ~0.40°. The measurement of the prototype circuit shows that with the discrete elements it is possible to obtain a total error of below 0.2° within the range from 0° to 5°, if the signals are of good quality.