Advanced circuit technology to realize post giga-bit DRAM

A 4-Gb DRAM with multilevel-storage memory cells has been developed. This large memory capacity is achieved by storing data at four levels, each level corresponding to the two-bit-data storage of a single memory cell. The four-level storage reduces the effective cell size by 50%. A sense amplifier that uses charge coupling and charge sharing was developed for the four level sensing and restoring operations. A 4-Gb DRAM was fabricated using 0.15-/spl mu/m CMOS technology, that measures 986 mm/sup 2/ in area. The area of the memory cell is 0.23 /spl mu/m/sup 2/. Its capacitance of 60 fF is achieved by use of a high-dielectric-constant material (Ba,Sr)TiO/sub 3/.