Synthesis of high-speed interconnects under constraints on timing and signal integrity

A method of interconnect synthesis described in this paper performs selection of net parameters (line segments length, width, and terminator values) based on timing and signal integrity requirements. An iterative method of computation combines a numerical simulation of signal waveforms at receivers by the very fast AWE (Asymptotic Waveform Evaluation) technique improved for accuracy by the CFH (Complex Frequency Hopping) with computation of voltage sensitivities to parameter changes of interconnects and terminators. Signal waveforms are approximated by the multivariable Taylor series with partial derivatives obtained during the AWE/CFH simulation without almost any additional cost. These series are formulated as constraints on delays and shapes of waveforms at receivers in a linear programming model at each iteration. The linear programming model allows to find new values of net parameters consistent with timing and signal integrity requirements. On each step deviation from the required arrival time and signal waveform decreases as a result of changes made in net parameters. The process converges very fast. The computation time is 1-2 seconds for a 3-pin net.