Signal flow graph in loop gain analysis of DC-DC PWM CCM switching converters

A systematic and unified method using the signal flow graph (SFG) technique is presented in analyzing dc-dc pulsewidth modulated (PWM) switch mode power converters (SMPC's) operating in the continuous conduction mode (CCM). Loop gains for single and multiloop systems are reviewed. The SFG of the converter is then generated from the perturbed state-space averaged (SSA) equations, and the characteristic polynomial of the system is computed. By grouping terms associated with the gain of the error amplifier as the numerator, a unique definition of system loop gain is introduced, and locations for breaking the loop are discussed. System loop gains for both voltage- and current-programming converters with either trailing- or leading-edge modulation are derived. It is shown that for a SMPC, the loop gain measured by an analog injection method is the system loop gain, which determines the stability of the converter.