Improving FPGA placement with a self-organizing map

This work shows how the results of netlist placement for island style FPGAs can be improved by the use of a self-organizing map. The structural information of a netlist is used to generate training vectors, which are classified by a self-organizing map. This classification is used to generate an initial placement for the renown iterative simulated annealing algorithm. By applying this procedure both the length of the critical path and the needed routing resources are reduced in comparison to the classical random initialization.