Current balancing control for parallel connected IGBTs using programmable gate driver output resistance

A gate driver IC with programmable output resistance (R
_out
) capable of performing current balancing for parallel connected IGBTs is presented in this paper. This novel method is to dynamically adjust the gate driver R
_out
to minimize the difference in the turn-on/off delay times between parallel connected IGBTs. The programmable gate driver R
_out
is implemented using a segmented output stage technique. This gate driver IC is designed and fabricated using TSMC's 0.18μm BCD Gen-2 process. Experimental results are obtained by measuring the current distribution between two parallel connected IGBTs (600V, 90A). These results indicate an improvement in average current imbalance of 89% and 98% for the turn-on and off periods, respectively.